As I've discussed on IRC I've been trying to write a simple 2nd stage bootloader that PBL will load from NAND that will then load u-boot. An uncompressed PBL block seems to have a limit of 16k, which is far too small for u-boot and I don't want to get into replacing PBL with u-boot entirely without JTAG.
Anyway. While I can init serial and flash the LEDs, I don't seem to be able to manage to even ident the NAND. My code isn't a lot different from the NAND code I wrote for u-boot and the kernel, so I'm not quite sure what I'm doing wrong. I've tried a dumb loop as a delay, as well as the cleverer timer based delay routines that u-boot uses. But I don't think this should be the problem, as as long as the delay is the minimal length it shouldn't matter if it's more?
The code is at:
http://the.earth.li/~noodles/ldr-new.tar.gz
It's rough and ready, but please, someone tell me what blindingly obvious thing I'm missing that means it doesn't work!
J.
Jonathan McDowell wrote:
As I've discussed on IRC I've been trying to write a simple 2nd stage bootloader that PBL will load from NAND that will then load u-boot. An uncompressed PBL block seems to have a limit of 16k, which is far too small for u-boot and I don't want to get into replacing PBL with u-boot entirely without JTAG.
Anyway. While I can init serial and flash the LEDs, I don't seem to be able to manage to even ident the NAND. My code isn't a lot different from the NAND code I wrote for u-boot and the kernel, so I'm not quite sure what I'm doing wrong. I've tried a dumb loop as a delay, as well as the cleverer timer based delay routines that u-boot uses. But I don't think this should be the problem, as as long as the delay is the minimal length it shouldn't matter if it's more?
The code is at:
http://the.earth.li/~noodles/ldr-new.tar.gz
It's rough and ready, but please, someone tell me what blindingly obvious thing I'm missing that means it doesn't work!
J.
Think I've fixed it. I now get: !LDR started. Looking for NAND. latch2 = 00 Enabling CE. latch2 = 00 Resetting chip. latch2 = 80 Writing: FF latch2 = 88 latch2 = A8 latch2 = 28 latch2 = A8 Writing: 70 latch2 = 88 latch2 = A8 latch2 = 28 latch2 = 20 latch2 = 28 Read: 40 Reading chip ID (send ReadID). latch2 = A8 Writing: 90 latch2 = 88 latch2 = A8 latch2 = 28 Reading chip ID (send addr 0). latch2 = 68 Writing: 00 latch2 = 48 latch2 = 68 latch2 = 28 Reading chip ID (manufacturer). latch2 = 20 latch2 = 28 Read: 98 Reading chip ID (id). latch2 = 20 latch2 = 28 Read: 75 Disabling CE. latch2 = 2C Found Tosh NAND. nand_boot(): Write me. Failed to find/boot from NAND. Twiddling my thumbs.
Seems to be a problem with data alignment?
Diff attached
Matt
On Tue, Apr 25, 2006 at 01:36:52PM +0100, Matt Callow wrote:
Jonathan McDowell wrote:
It's rough and ready, but please, someone tell me what blindingly obvious thing I'm missing that means it doesn't work!
Think I've fixed it. I now get:
...
Seems to be a problem with data alignment?
- *(volatile u16 *) 0x08000000 = ams_delta_latch2_val;
- *(volatile u8 *) 0x08000000 = ams_delta_latch2_val;
Given that this appears to be what fixes it, yes, that seems likely. However it now works for me too, so thanks for that. Now all I need to do is finish the routine to read u-boot from NAND.
J.
On Tue, Apr 25, 2006 at 01:49:31PM +0100, Jonathan McDowell wrote:
On Tue, Apr 25, 2006 at 01:36:52PM +0100, Matt Callow wrote:
Jonathan McDowell wrote:
It's rough and ready, but please, someone tell me what blindingly obvious thing I'm missing that means it doesn't work!
Think I've fixed it. I now get:
...
Seems to be a problem with data alignment?
- *(volatile u16 *) 0x08000000 = ams_delta_latch2_val;
- *(volatile u8 *) 0x08000000 = ams_delta_latch2_val;
Given that this appears to be what fixes it, yes, that seems likely. However it now works for me too, so thanks for that. Now all I need to do is finish the routine to read u-boot from NAND.
Leading to the following output from a freshly powered on E3:
Amstrad Delta - PBL V4.9 Build:1311 Assert Debug ICE PBL 32MB NAND 0MB.-->MEMv01.00.002,CopyLim=00220000h,CodeEnd=01400000h-->PBL......1MB.......2MB*
!LDR started. Looking for NAND. Enabling CE. Resetting chip. Reading chip ID (send ReadID). Reading chip ID (send addr 0). Reading chip ID (manufacturer). Reading chip ID (id). Disabling CE. Found Tosh NAND. Loading u-boot................................................................................................................................................................................................................................................................ Starting u-boot.
U-Boot 1.1.4 (Mar 22 2006 - 02:13:39)
U-Boot code: 11F00000 -> 11F148D0 BSS: -> 11F15D60 RAM Configuration: Bank #0: 10000000 32 MB Flash: 0 kB NAND:32 MB Using default environment
In: serial Out: serial Err: serial E3 #
J.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
Jonathan McDowell wrote: [...]
Leading to the following output from a freshly powered on E3:
Hurrah! This is great news; it means that sometime soon I should finally be able to get rid of the serial cable...
Just out of interest, what did you use to bless the PBL image you uploaded? The code I've currently got in pblq uses a brute-force method to calculate the checksum of simply trying every possible value in turn until the checksum succeeds, which is highly unsatisfactory. I'm looking for a better algorithm.
(I've got pblq now talking to both the E2 *and* the E3, and would like to do some final cleaning up before releasing it.)
- -- +- David Given --McQ-+ "If you're up against someone more intelligent | dg@cowlark.com | than you are, do something insane and let him think | (dg@tao-group.com) | himself to death." --- Pyanfar Chanur +- www.cowlark.com --+
On Tue, Apr 25, 2006 at 10:53:19PM +0100, David Given wrote:
Jonathan McDowell wrote: [...]
Leading to the following output from a freshly powered on E3:
Hurrah! This is great news; it means that sometime soon I should finally be able to get rid of the serial cable...
Unfortunately I'm now stuck at the point where I can turn on the E3, have PBL load !LDR from NAND, !LDR load u-boot from NAND, u-boot load the kernel from NAND, the kernel does its uncompression, then hangs. Whereas if I load the same !LDR image to PBL over the serial port loading everything else from NAND works fine. So I need to track down what PBL twiddles when loading something from NAND that's breaking it all.
Just out of interest, what did you use to bless the PBL image you uploaded? The code I've currently got in pblq uses a brute-force method to calculate the checksum of simply trying every possible value in turn until the checksum succeeds, which is highly unsatisfactory. I'm looking for a better algorithm.
My code is roughly:
u8 i, j; int curchar; int len;
curchar = fgetc(stdin); len = 0; while (curchar != EOF) { i += curchar; i = i & 0xFF; j += i; j = j & 0xFF; } printf("Fixup bytes for offset 6 = 0x%02X, 7 = 0x%02X\n, (-j + (len - 7) * i) & 0xFF, (j - (len - 6) * i) & 0xFF);
J.
On Wed, Apr 26, 2006 at 04:19:14PM +0100, Jonathan McDowell wrote:
On Tue, Apr 25, 2006 at 10:53:19PM +0100, David Given wrote:
Jonathan McDowell wrote: [...]
Leading to the following output from a freshly powered on E3:
Hurrah! This is great news; it means that sometime soon I should finally be able to get rid of the serial cable...
Unfortunately I'm now stuck at the point where I can turn on the E3, have PBL load !LDR from NAND, !LDR load u-boot from NAND, u-boot load the kernel from NAND, the kernel does its uncompression, then hangs. Whereas if I load the same !LDR image to PBL over the serial port loading everything else from NAND works fine. So I need to track down what PBL twiddles when loading something from NAND that's breaking it all.
Er, and now bizarrely I find that disabling CONFIG_DEBUG_MUTEXES means it boots, which just seems wrong.
This means I now have an E3 that will boot (albeit slowly) without having to be fed anything over the serial port. I'll try and get a tarball of bits and instructions together this week so some other brave soul can try and let us know if it works for them too. :)
What's everyone else working on at present and how's it going?
J.
On 14 May 2006, at 21:43, Jonathan McDowell wrote:
This means I now have an E3 that will boot (albeit slowly) without having to be fed anything over the serial port.
Breakthrough! I've been playing with the JTAG probe but haven't managed anything yet.
I'll try and get a tarball of bits and instructions together this week so some other brave soul can try and let us know if it works for them too. :)
I certainly will.
What's everyone else working on at present and how's it going?
I have an E3 on my desk in bits right now. I had to do a release at work last week so I haven't really been able to do much. The good news was that loads of people at work have been asking me what it is- everyone's fascinated by the funny little computer with a phone built in.
Thanks for sending it :-)
-J.
Jonathan McDowell wrote:
This means I now have an E3 that will boot (albeit slowly) without having to be fed anything over the serial port. I'll try and get a tarball of bits and instructions together this week so some other brave soul can try and let us know if it works for them too. :)
Excellent
What's everyone else working on at present and how's it going?
Haven't had much time recently, but still working on the camera. No luck in getting any info from Omnivision though :(
Matt
--- Jonathan McDowell noodles@earth.li wrote:
On Wed, Apr 26, 2006 at 04:19:14PM +0100, Jonathan McDowell wrote:
On Tue, Apr 25, 2006 at 10:53:19PM +0100, David Given wrote:
Jonathan McDowell wrote: [...]
Leading to the following output from a freshly powered on E3:
Hurrah! This is great news; it means that sometime soon I should finally be able to get rid of the serial cable...
Unfortunately I'm now stuck at the point where I can turn on the E3, have PBL load !LDR from NAND, !LDR load u-boot from NAND, u-boot load the kernel from NAND, the kernel does its uncompression, then hangs. Whereas if I load the same !LDR image to PBL over the serial port loading everything else from NAND works fine. So I need to track down what PBL twiddles when loading something from NAND that's breaking it all.
Er, and now bizarrely I find that disabling CONFIG_DEBUG_MUTEXES means it boots, which just seems wrong.
Very strange, how on earth did you find out that disabling CONFIG_DEBUG_MUTEXES made it work? Well done on getting it to boot.
This means I now have an E3 that will boot (albeit slowly) without having to be fed anything over the serial port. I'll try and get a tarball of bits and instructions together this week so some other brave soul can try and let us know if it works for them too. :)
Once I have rebuilt my E3 I'll do that!
What's everyone else working on at present and how's it going?
Not much. Last thing I was working was the sound. I would really like to get the mixer working properly (well at all!). I tried building the sound driver as a module and running the commands that put the modem into speaker phone mode and then install the sound driver, but it still comes out the handset and I can't find a data sheet for the Voice Codec :-/. If anyone else has time could they try the same trick (build sound driver a module, put modem into speaker phone mode, install sound driver) and let me know if it works for them, or any other idea's for getting this to work (Cliff :-))
J.
Mark
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On Wed, May 17, 2006 at 09:13:19PM +0100, Mark Underwood wrote:
Er, and now bizarrely I find that disabling CONFIG_DEBUG_MUTEXES means it boots, which just seems wrong.
Very strange, how on earth did you find out that disabling CONFIG_DEBUG_MUTEXES made it work? Well done on getting it to boot.
Copious debug output lead me to discover it was hanging in mutex_lock and I went to turn on DEBUG_MUTEXES only to discover it was already enabled, so I disabled it.
What's everyone else working on at present and how's it going?
Not much. Last thing I was working was the sound. I would really like to get the mixer working properly (well at all!). I tried building the sound driver as a module and running the commands that put the modem into speaker phone mode and then install the sound driver, but it still comes out the handset and I can't find a data sheet for the Voice Codec :-/.
I failed to find any datasheet for it either. Mixer support would be great; it's a bit too loud to use the handset at present.
J.
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David Given -
Jasmine Strong -
Jonathan McDowell -
Mark Underwood -
Matt Callow