[E3-hacking] E2 PBL response
Tue, 15 Mar 2005 11:32:56 +0000
Welcome to the list!
Let me instantly diverge off-topic:
On 15 Mar 2005, at 08:55, Peter Washington wrote:
> I think that with the particular mix of people we now seem to have
> looking at this problem we should have it licked pretty quickly.
> On another subject entirely, (which should probably be handled further
> in some other forum), Ralph and I have been talking about
> home made Digital Storage Oscilloscopes recently, if either Matt or
> David would like to join forces with us maybe we could have a
> bash at actually making something.
Me me me! :-) I was looking at buying one recently... even ebay
wasn't cheap :/ I would be interested in this. I'm also probably more
interested in building a logic analyser, and it's something I was
planning to try out on my Xilinx FPGA board. These devices in
particular should be pretty good to trace to a certain depth since the
larger ones have a pretty reasonable amount of RAM (or spare FFs).
One of the things I was thinking of doing with the E2.... was to use it
as the front-end to a FPGA-based logic analyser backend. Screen size =
pretty good.. and of course with a logic analyser the screen's mostly
just a GUI so bus speed (16bit) shouldn't be too much of a bottleneck.
But yes I'm interested in your plans for a DSO (they may share a lot of
common ground too).. anyone got a wiki to scribble ideas on?
[Maybe I should say my background is in CompEng, so my studies were in
hardware/VLSI.. nothing remotely analogue though (don't say 'FET' :P )
so you guys sort that angle.. ;) I have some experience with using
FPGAs though (ideal for complex ASIC-needing homebrew projects), if