[E3-hacking] Re: E2 PBL bios dump.
Mon, 21 Feb 2005 23:07:19 +0000
> I also had an idea for recovery of the bios of the E3, has anyone yet
> worked out if the Jtag port of the CPU in the E3 is taken to a usable
> header on the e3's board.
Or to some test pads immediately underneath the OMAP5910 SoC? If anyone
does have their E3 in bits, a photograph of the top and bottom of the
main PCB good enough to read IC lettering would be helpful. Using a
flat-bed scanner can be a good way to achieve this, but make sure not to
scratch the glass.
> According to the datasheet for the e3's cpu the jtag pins are at
> locations U15, U16, U17, T14 and R13 (the jtag signals are called
> (nTrst, TDO, TDI, TMS and TCK off hand i cant rember which pin is
Signal GZG GDY
TCK W18 T14
TDI Y19 U17
TDO AA19 U16
TMS V17 R13
/TRST Y18 U15
> I think the jtag interface from tailor-madecircuits,
> http://www.tailor-madecircuits.com/jtag_interface.htm , should work
> for dumping the bios but it doesnt have the nTrst circuitry, but I
> think it will work, but be warned TMC have had a run on these so there
> is a bit of a delay on them.
Thanks for the URL, I wasn't aware of them.