Matt Callow wrote:
using pbltool with the default linux.pbl as provided by Mark wont touch the Amstrad code - it only writes to RAM, so a powercycle of the E3 will bring it back to it's default state.
Okaaaaay.... I really beginning to get the feeling that I'm asking for privilidged or restricted information here, and no one wants to say "we're not going to tell you that" :-)
Last try. Please could someone detail the memory map. Address ranges of NOR, NAND; SDRAM; location of Amstrad code, PBL loader, that sort of thing. At least then I'll be able to make more informed choices about where I can put my own code and stuff...
As an incentive, I have an Omnivision OV6650 datasheet for the first correct respondant! :-)
On Wed, May 17, 2006 at 08:18:32AM +0000, David J. Singer wrote:
Matt Callow wrote:
using pbltool with the default linux.pbl as provided by Mark wont touch the Amstrad code - it only writes to RAM, so a powercycle of the E3 will bring it back to it's default state.
Okaaaaay.... I really beginning to get the feeling that I'm asking for privilidged or restricted information here, and no one wants to say "we're not going to tell you that" :-)
It's all been discussed on the list before. The archives are publicly available; it's well worth going back and reading through them.
Last try. Please could someone detail the memory map. Address ranges of NOR, NAND; SDRAM; location of Amstrad code, PBL loader, that sort of thing. At least then I'll be able to make more informed choices about where I can put my own code and stuff...
NOR is at 0x0. SDRAM is 32MB at 0x10000000. NAND isn't memory mapped; it hangs off the MPUIO GPIO pins and latch2.
You keep talking about the "location of Amstrad code". I'm not quite sure why. PBL lives in the NOR and the rest of the code is loaded from the NAND into memory. If you use pbltool to load Linux then all of SDRAM is yours to play with; PBL uses it for scratch storage, but not once you've entered u-boot.
J.
Jonathan McDowell wrote:
On Wed, May 17, 2006 at 08:18:32AM +0000, David J. Singer wrote:
Okaaaaay.... I really beginning to get the feeling that I'm asking for privilidged or restricted information here, and no one wants to say "we're not going to tell you that" :-)
I don't think anyone is trying to hide anything from you :-)
NOR is at 0x0. SDRAM is 32MB at 0x10000000. NAND isn't memory mapped; it hangs off the MPUIO GPIO pins and latch2.
And the address for the standard OMAP stuff can be found in the TI documentation. The Amstrad specific peripherals are documented (at least as much as we know) on the wiki
Matt
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David J. Singer -
Jonathan McDowell -
Matt Callow