Hi Janusz, My ARM's not used much these days so I don't know how much this matters and may be incorrect so I've cut down the CC list, but given it's a FIQ handler and speed matters...
+key: @Is it a keyboard interrupt? + ldr r11, [r12,#GPIO_INTERRUPT_STATUS] @ get GPIO interrupt status + and r10, r11, #MBRD_CLK_MASK @ reveal keyboard bit + cmp r10, #MBRD_CLK_MASK @ is keyboard bit low? + bne mdm @ no - spurious - try mdm
Couldn't that be an `ands' instruction if MBRD_CLK_MASK has one-bit set? Then the cmp could be deleted.
+state: + ldr r10, [r9,#FIQ_STATE] + cmp r10, #0 @ are we expecting start bit? + bne data @ no - in data processing state
Similarly, an `ldrs' here would make the cmp redundant. There's other similar bits elsewhere. Thanks for continuing with these E3 patches. Cheers, Ralph.