[E3-hacking] Trying to load u-boot from NAND.

Matt Callow mc-lists at tesco.net
Tue Apr 25 13:36:52 BST 2006


Jonathan McDowell wrote:

>As I've discussed on IRC I've been trying to write a simple 2nd stage
>bootloader that PBL will load from NAND that will then load u-boot. An
>uncompressed PBL block seems to have a limit of 16k, which is far too
>small for u-boot and I don't want to get into replacing PBL with u-boot
>entirely without JTAG.
>
>Anyway. While I can init serial and flash the LEDs, I don't seem to be
>able to manage to even ident the NAND. My code isn't a lot different
>from the NAND code I wrote for u-boot and the kernel, so I'm not quite
>sure what I'm doing wrong. I've tried a dumb loop as a delay, as well as
>the cleverer timer based delay routines that u-boot uses. But I don't
>think this should be the problem, as as long as the delay is the minimal
>length it shouldn't matter if it's more?
>
>The code is at:
>
>http://the.earth.li/~noodles/ldr-new.tar.gz
>
>It's rough and ready, but please, someone tell me what blindingly
>obvious thing I'm missing that means it doesn't work!
>
>J.
>
>  
>
Think I've fixed it. I now get:
!LDR started.
Looking for NAND.
latch2 = 00
Enabling CE.
latch2 = 00
Resetting chip.
latch2 = 80
Writing: FF
latch2 = 88
latch2 = A8
latch2 = 28
latch2 = A8
Writing: 70
latch2 = 88
latch2 = A8
latch2 = 28
latch2 = 20
latch2 = 28
Read: 40
Reading chip ID (send ReadID).
latch2 = A8
Writing: 90
latch2 = 88
latch2 = A8
latch2 = 28
Reading chip ID (send addr 0).
latch2 = 68
Writing: 00
latch2 = 48
latch2 = 68
latch2 = 28
Reading chip ID (manufacturer).
latch2 = 20
latch2 = 28
Read: 98
Reading chip ID (id).
latch2 = 20
latch2 = 28
Read: 75
Disabling CE.
latch2 = 2C
Found Tosh NAND.
nand_boot(): Write me.
Failed to find/boot from NAND. Twiddling my thumbs.
   
Seems to be a problem with data alignment?
                                               
Diff attached

Matt

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